NanoWatt offers variations of SCL, Bundled Delay, and Globally Asynchronous Locally Synchronous architectures. The patent-pending SSAS architecture is specifically targeted to multi-core processors, where each processor is allowed to operate “just as fast as it must”.

A multi-core processor array can be rapidly customized to meet specific user requirements.


Practical asynchronous circuit Architectures

Technology Background

One category of asynchronous circuits is termed delay insensitive (DI), since they can automatically adapt to changes in environmental and physical factors. In addition, a DI asynchronous circuit can run as fast as allowed by current conditions. For example, if supply voltage is reduced, a DI asynchronous circuit will simply slow down. By contrast, synchronous circuits must assume the worst case for environmental and physical factors, and designers must slow down the clock to ensure correct operation. Sleep Convention Logic (SCL) is one architecture that allows DI operation, and simultaneously minimizes standby leakage power. NanoWatt Design has several patents related to SCL.

Bundled Delay

Bundled Delay (BD) is another asynchronous circuit architecture that provides a great deal of design flexibility. With BD, synchronous combinational logic is left relatively untouched, while delay lines and completion detectors are added to determine when the logic has completed processing. NanoWatt Design has an automated solution for conversion of a synchronous circuit to BD. Such circuits are not delay insensitive, but are tolerant to changes in supply voltage and temperature.


Switchable Synchronous to Asynchronous voltage and frequency Scaling (SSAS) is applied to enable multiple cores to operate with independent clocks. The approach relies on Globally Asynchronous Locally Synchronous (GALS) architecture, and further implements voltage and frequency scaling. A patent-pending method is used for low latency switching. SSAS is a powerful method for reducing power consumption while meeting latency and workload requirements. The method is most appropriate for off-loading tasks from a general purpose processor, potentially delivering 100 – 1,000x reduction in power consumption.

NanoWatt Design's Competitive Advantages