Practical asynchronous circuit Architectures
One category of asynchronous circuits is termed delay insensitive (DI), since they can automatically adapt to changes in environmental and physical factors. In addition, a DI asynchronous circuit can run as fast as allowed by current conditions. For example, if supply voltage is reduced, a DI asynchronous circuit will simply slow down. By contrast, synchronous circuits must assume the worst case for environmental and physical factors, and designers must slow down the clock to ensure correct operation. Sleep Convention Logic (SCL) is one architecture that allows DI operation, and simultaneously minimizes standby leakage power. NanoWatt Design has several patents related to SCL.
Bundled Delay (BD) is another asynchronous circuit architecture that provides a great deal of design flexibility. With BD, synchronous combinational logic is left relatively untouched, while delay lines and completion detectors are added to determine when the logic has completed processing. NanoWatt Design has an automated solution for conversion of a synchronous circuit to BD. Such circuits are not delay insensitive, but are tolerant to changes in supply voltage and temperature.
Switchable Synchronous to Asynchronous voltage and frequency Scaling (SSAS) is applied to enable multiple cores to operate with independent clocks. The approach relies on Globally Asynchronous Locally Synchronous (GALS) architecture, and further implements voltage and frequency scaling. A patent-pending method is used for low latency switching. SSAS is a powerful method for reducing power consumption while meeting latency and workload requirements. The method is most appropriate for off-loading tasks from a general purpose processor, potentially delivering 100 – 1,000x reduction in power consumption.
NanoWatt Design's Competitive Advantages
- As industry progresses to smaller transistors, supply voltages keep getting lower and lower, resulting in lower power consumption. The dilemma is that along with lower voltage speed drops dramatically, making it increasingly difficult to complete the required workload in time. Asynchronous circuits readily adapt to changes in speed.
- Latency (speed) for completing required workload can be met by dividing computation tasks amongst multiple cores operating in parallel. NanoWatt’s multi-core processor can be easily customized to a particular task.
- As supply voltages drop, variation in logic propagation delays continues to grow. More design resources must be devoted to verifying that a synchronous design works properly and with acceptable manufacturing yield. On the other hand, correct operation can potentially be guaranteed by introducing asynchronous circuitry. NanoWatt Design has options for increased robustness against process variation.
- Standby leakage power also grows exponentially as transistor threshold voltages drop. SCL offers the option of putting a circuit into a low leakage power state without requiring a separate sleep management circuit.
- Low power, low speed capability of SCL is particularly important for some applications, such as energy harvesting applications where battery life is much more important that circuit speed.
- Asynchronous circuits produce negligible electromagnetic interference (EMI).
- NanoWatt Design offers script-based customization of Synopsys tools for easy synthesis of asynchronous gate netlists. With the large number of transistors used in circuits today, automation of design is extremely important. Extending conventional synchronous design tools to asynchronous design is a critical enabler for design automation that is not readily available with competitors.